Entry facet
Use cases & realizations
Where the code fits and what has been demonstrated.
Use cases & fit
Platforms: superconducting-linear-array trapped-ion-small-register semiconductor-spin-array
Tasks: biased-noise-memory syndrome-extraction-benchmark decoder-calibration logical-parity-operations
Physical realizations
superconducting linear parity-check arrays demonstrated
Repeated stabilizer measurements were decoded from complete syndrome histories, and later increasing-chain experiments separately tested bit-flip and phase-flip suppression. These are one-sector, protocol- and decoder-specific results rather than arbitrary-state quantum memories.
References: kelly2015preservation, chen2021repetitive
trapped-ion repeated-correction register demonstrated
Repeated correction cycles were implemented on a small ion register. The demonstration establishes closed protocol repetition at fixed size; it does not by itself supply a growing-family threshold.
References: schindler2011repetitive
semiconductor spin-qubit registers demonstrated
Small spin-qubit blocks demonstrated bit-flip correction and a phase-flip-code implementation. Their control, readout, and noise-bias assumptions remain part of the realization claim.
References: takeda2022silicon, vanriggelen2022phaseflip
split surface-code superconducting layout demonstrated
A surface-code patch was split into two distance-three repetition blocks and used for a joint logical operation. This demonstrates the merge/split protocol and its decoding stack, not an operation native to an isolated chain with no ancillary geometry.
References: besedin2025repetition