Distillation, switching, and realization ledger

Question. What does the exact block algebra contribute to a universal protocol, and which costs or experimental conclusions remain outside it?

The transversal phase is a component, not a complete factory or universal gate set. This page gives one exact combinatorial model and then restores the protocol layers that model intentionally omits.

1. Exact idealized 15-to-1 error ledger

Consider independent phase-error bits on fifteen input resources, each equal to one with probability p. Assume ideal Clifford processing and identify an error support e with a Z pattern on the Reed–Muller block. The X-check syndrome accepts exactly when

H_X e^T = 0,

so accepted supports are the 2048 words in ker(H_X). Even accepted supports are Z stabilizers and preserve the output logical value; odd accepted supports are the logical-Z coset and flip it.

Using the exact enumerators from the distance page, define

A(p) = (1-p)^15
     + 35 p^3 (1-p)^12
     + 105 p^4 (1-p)^11
     + 168 p^5 (1-p)^10
     + 280 p^6 (1-p)^9
     + 435 p^7 (1-p)^8
     + 435 p^8 (1-p)^7
     + 280 p^9 (1-p)^6
     + 168 p^10 (1-p)^5
     + 105 p^11 (1-p)^4
     + 35 p^12 (1-p)^3
     + p^15,

B(p) = 35 p^3 (1-p)^12
     + 168 p^5 (1-p)^10
     + 435 p^7 (1-p)^8
     + 280 p^9 (1-p)^6
     + 105 p^11 (1-p)^4
     + p^15.

A(p) is the acceptance probability in this algebraic model, and B(p)/A(p) is the conditional output phase-error probability. The leading bad term is 35 p^3: thirty-five weight-three projective lines survive the checks and act logically.

The reproduction script enumerates all 32768 input supports, rebuilds both polynomials, and checks the conditional error numerically at fixed sample values. This is not a circuit-level factory curve. No preparation faults, Clifford faults, measurement faults, correlated inputs, routing, or decoder latency appear in the model.

The use of this block for magic-state distillation is sourced to Bravyi and Kitaev; the coefficient and polynomial above are independently recomputed from the shipped constructor under the stated model.

2. Code switching is a different use of the block

Steane and the fifteen-qubit Reed–Muller block expose complementary transversal operations. A switching protocol:

  1. embeds or interprets the current block in a common subsystem description;
  2. measures checks that select the target gauge;
  3. repeats or verifies those measurements according to a fault-tolerance rule;
  4. uses the observed history to update a Pauli frame or reject the run;
  5. applies the target block's transversal gate;
  6. optionally reverses the conversion.

This converts a logical state, not merely a matrix file. The conversion syndrome and conditional correction are part of the logical operation. Anderson, Duclos-Cianci, and Poulin give explicit bidirectional fault-tolerant conversion; Bravyi and Cross explain the doubled color-code/gauge-fixing structure; and Paetznick and Reichardt place transversal layers and error correction inside a universal protocol.

The abstract cost recorded on the card therefore includes conversion, syndrome extraction, conditional correction, and a trip through Steane for H. It does not call H a transversal gate of the unchanged Reed–Muller block.

3. Resource-changing neighbors

Nearby constructions answer different questions:

constructionwhat changeswhat must be recomputed
doubled/gauge-fixed color codequbits, gauge group, and measured checksblock size, gauge/stabilizer ranks, conversion faults
concatenated Steane/Reed–Mullernesting level and gate partitiontotal qubits, effective distance, gadgets, decoder
morphed descendantsa region is replaced by its child codeencoded dimension, distance, and operation set
tensor-network tilingmany encoder tensors are contractedglobal stabilizers, logicals, geometry, and distance

These are not equivalent relabelings of the fifteen-qubit stabilizer matrix. The variants sweep ties the first three distinctions to doubled codes, concatenation, and morphing. The tensor view is sourced to Quantum Lego.

4. Demonstrated capability ledger

workplatformdemonstrated boundarynot established by that result
Daguerre et al. (2025)trapped ionspreparation of a fifteen-qubit logical resource, Reed–Muller-to-Steane switching, and certification of the accepted logical magic stateincreasing-distance Reed–Muller memory scaling or a circuit-independent switching rate
Bluvstein et al. (2025)reconfigurable neutral atomsuse of 3D fifteen-qubit blocks as teleportation and arbitrary-angle-synthesis resources inside a larger architecture with other codes and qubit reusea bare-block memory threshold or a claim that all architecture overhead belongs to this code

Both rows are operation-level demonstrations. Neither varies a Reed–Muller distance parameter, because this constructor has none. The realization sweep also found no superconducting implementation of this fifteen-qubit block in its stated searches as of 2026-08-02. The neutral-atom paper's current fetched title is retained in the reference registry; an earlier title is recorded as title drift, not as a second work.

5. Quantitative-claim audit

This page contains one quantitative model and no device performance number:

  1. Code and boundary: the fixed punctured four-variable [[15,1,3]] block in the constructor's qubit/logical convention.
  2. Scaling variable and observable: input phase-error probability p and conditional accepted logical phase-error probability B(p)/A(p).
  3. Circuit or schedule: ideal Clifford reduction to the block's X-check acceptance equations; no physical extraction schedule is modeled.
  4. Noise and normalization: independent identically distributed input Z errors, one Bernoulli trial per input resource.
  5. Decoder/postprocessing: accept zero X syndrome; classify accepted odd kernel words as logical Z; exact enumeration version qrm15-distillation-enumerator-v1.
  6. Source location: protocol role from Bravyi–Kitaev; coefficients recomputed from constructor.H_X and the logical parity quotient.
  7. Claim type: exact finite-block combinatorial model, not a threshold, pseudo-threshold, one-point device rate, or circuit-level bound.

A future factory benchmark must replace the idealized circuit line with a versioned preparation/extraction circuit and retain all physical fault locations, acceptance rules, decoder inputs, and logical observables.