目录Contents
用例与契合：这张矩阵向芯片要什么Use case & fit: what this matrix asks of a chip
一个码不是「装到任何芯片上都一样」。它向硬件递出一份契约：比特怎么排、谁能和谁连线、一轮测量要走几步。表面码的契约是「二维、只连邻居、四腿检查」；BB 码把其中两条改掉了。这一章先写清 BB 的契约，再看 QEC-Bank 卡片上三个平台标签、两项任务各由什么记录支撑，最后把「144 个数据比特」这本账算全。 A code does not “work the same on any chip”. It hands the hardware a contract: how qubits are arranged, who may be wired to whom, how many steps one measurement round takes. The surface code's contract reads “two-dimensional, neighbours only, four-leg checks”; the BB code rewrites two of those clauses. This chapter spells out the BB contract, then traces the three platform tags and two tasks on the QEC-Bank card to the records that back them, and finally completes the “144 data qubits” ledger.
1.1契约的四条款The four clauses of the contract
先回忆 gross 码长什么样：l = 12、m = 6 的环面（l、m 是环面两个方向的格数），每格两个数据比特，n = 2lm = 144；两个多项式 A = x³ + y + y²、B = y³ + x + x² 各三项，所以每条检查六腿（|A| + |B| = 3 + 3，|A| 记 A 的项数），每个数据比特被 3 条 X 检查和 3 条 Z 检查碰到（《BB 码 · 高中数学版》3.3 节）。这些数字直接翻译成硬件要求。第一条：每个数据比特要连 6 根线，而且「往右三格」「往上三格」这种腿不是邻居——Bravyi 等人证明这张Tanner 图检查矩阵的图形版：一侧是比特、一侧是检查，H 的每个 1 是一条边。它决定芯片需要哪些耦合器，不决定 CNOT 的顺序。可以拆成两层平面图、每层每个比特最多三根线，但一层最近邻的方格芯片装不下它（6.1 节）。说白了：要么有长程耦合器，要么原子能搬，要么把码切成几块用链路连起来——第 1.2 节的三个平台标签正是这三种答案。第二条：检查重量 6，一条检查要 6 个 CNOT 而不是 4 个。第三条（这条和下一条是 Bravyi 等人论文的提取方案，不是静态矩阵推出的硬件必然）：每条检查一个辅助比特——gross 有 144 条检查，就要 144 个辅助比特，总数 288。第四条：144 条检查的 864 个 CNOT 要排进 7 层（6.2 节）；顺序排错，电路的实际码距会低于静态的 12。QEC-Bank 直觉文稿把这条说得最硬：「症状电路、CNOT 顺序、探测器模型与译码器是存储器的一部分；一张静态的 [[n,k,d]] 矩阵本身不认证电路码距。」
Recall what the gross code looks like: an l = 12 by m = 6 torus (l, m are the cell counts along the two directions), two data qubits per cell, n = 2lm = 144; two three-term polynomials A = x³ + y + y² and B = y³ + x + x², so every check has six legs (|A| + |B| = 3 + 3, where |A| is the number of terms of A) and every data qubit is touched by 3 X checks and 3 Z checks (§3.3 of “BB Codes · High-School Edition”). Those numbers translate directly into hardware demands. Clause one: every data qubit needs 6 wires, and legs such as “three cells to the right” or “three cells up” are not neighbours. Bravyi et al. show the Tanner graphThe picture of a check matrix: qubits on one side, checks on the other, one edge per 1 in H. It decides which couplers a chip needs, not the CNOT order. splits into two planar layers with at most three wires per qubit per layer, but a single-layer nearest-neighbour grid cannot hold it (§6.1). In plain words: either you have long-range couplers, or the atoms can move, or you cut the code into modules joined by links; the three platform tags of §1.2 are exactly those three answers. Clause two: check weight 6, so a check costs 6 CNOTs, not 4. Clause three (this clause and the next are the extraction protocol of Bravyi et al., not consequences of the static matrix): one ancilla per check; gross has 144 checks, hence 144 ancillas and 288 qubits in all. Clause four: the 864 CNOTs of the 144 checks must fit into 7 layers (§6.2); a wrong order gives the circuit a smaller distance than the static 12. The QEC-Bank intuition essay puts it bluntly: “The syndrome circuit, CNOT ordering, detector model, and decoder are part of the memory. A static [[n,k,d]] check matrix alone does not certify circuit distance.”
这句话里的探测器要先说清。一条检查每轮测一次，第 t 轮的读数记 st（0 或 1）。探测器不直接看 st，而是把同一条检查相邻两轮的读数比一比：Dt = st ⊕ st−1（⊕ 是模 2 加，两轮相同得 0，不同得 1）。例子：某个数据比特在第 3、4 轮之间被翻了一下，碰到它的检查从第 4 轮起一直读 1，读数串是 0, 0, 0, 1, 1, 1……，探测器只在第 4 轮亮一次；如果数据没错、只是第 4 轮的测量读错了，读数串是 0, 0, 0, 1, 0, 0……，探测器在第 4、5 轮各亮一次。两种故障留下的「亮灯图案」不同，译码器靠这个区分它们。探测器模型就是一张完整的表：电路里每一种可能的故障，会点亮哪几个探测器。换电路、换 CNOT 顺序、换测量节拍，这张表都会变，所以它和译码器一样是存储器的一部分。
The detector in that sentence needs a definition first. A check is measured once per round; call its outcome in round t st (0 or 1). A detector does not look at st itself; it compares the same check in two consecutive rounds: Dt = st ⊕ st−1 (⊕ is addition mod 2: 0 if the two rounds agree, 1 if they differ). Example: a data qubit is flipped between rounds 3 and 4, so a check touching it reads 1 from round 4 on; the outcome string is 0, 0, 0, 1, 1, 1, …, and the detector lights once, in round 4. If the data are fine and only the round-4 measurement misreads, the string is 0, 0, 0, 1, 0, 0, … and the detector lights in rounds 4 and 5. The two faults leave different light patterns, and that is how a decoder tells them apart. The detector model is the complete table: for every possible fault in the circuit, which detectors it lights. Change the circuit, the CNOT order or the measurement cadence and the table changes, which is why it belongs to the memory just as the decoder does.
+ 每检查一个辅助比特one ancilla per check + 深度 7 的调度a depth-7 schedule
记号：n = 物理（数据）比特数，k = 逻辑比特数（两者的定义见《从高考数学到 Toric Code》4.4 节），d = 码距，即骗过全部检查的最轻逻辑算符的重量（同一教程 5.8 节）；l、m = 环面两个方向的格数；A、B = 两个多项式，|A|、|B| = 它们的项数；「度」= 一个比特连出的边数；864 = 144 条检查 × 6 个 CNOT，本页算的。
Notation: n = number of physical (data) qubits, k = number of logical qubits (both defined in §4.4 of “From High-School Math to the Toric Code”), d = code distance, the weight of the lightest logical operator that fools every check (§5.8 of the same guide); l, m = cell counts along the two torus directions; A, B = the two polynomials, |A|, |B| = their term counts; “degree” = the number of edges leaving a qubit; 864 = 144 checks × 6 CNOTs, this page's arithmetic.
1.2三个平台标签，两项任务，只有一条真机记录Three platform tags, two tasks, one real-machine record
卡片的 fit 字段写着三个平台：superconducting-long-range（有长程耦合器的超导芯片）、neutral-atom-reconfigurable（能用光镊搬动原子的中性原子阵列）、modular-networked（几块处理器用量子链路连成网）；两项任务：memory（把逻辑比特存住）与 modular-computation（在模块之间做逻辑运算）。三个标签对应 1.1 节第一条款的三种解法：长线、搬动、切块。但请对照下表最后一列——只有第一个平台有 demonstrated 记录（昆仑处理器，第 3 章）；中性原子和模块化两个标签目前各由 proposed 记录支撑（第 4 章）。这与表面码实现页不同：那里两个平台标签都有真机实验。换成人话：BB 卡片的「契合」是「设计上契合、有人认真算过」，不全是「有人在实验室里做出来了」。
The card's fit field lists three platforms: superconducting-long-range (superconducting chips with long-range couplers), neutral-atom-reconfigurable (atom arrays whose atoms are moved by optical tweezers) and modular-networked (several processors joined by quantum links); and two tasks: memory (keep logical qubits alive) and modular-computation (logical operations across modules). The three tags are the three answers to clause one of §1.1: long wires, motion, modules. But look at the last column of the table: only the first platform has a demonstrated record (the Kunlun processor, Chapter 3); the neutral-atom and modular tags are each backed, at present, by proposed records (Chapter 4). That differs from the surface-code realizations page, where both platform tags carry real experiments. In plain words: “fit” on the BB card means “fits by design and someone has costed it carefully”, not always “someone built it in a lab”.
| 卡片标签Card tag | 人话In plain words | 解决契约的哪一条Which clause it answers | 支撑记录与状态Backing record & status |
|---|---|---|---|
| superconducting-long-range | 固定的超导比特，但耦合器能跨过几个格子连线。Fixed superconducting qubits, but couplers can wire across several cells. | 第一条：长程的腿Clause one: long legs | wang2026lowoverhead · demonstrated |
| neutral-atom-reconfigurable | 原子可以被搬到要和谁作用的旁边，「连线」由搬运决定。Atoms are carried next to whoever they must interact with; “wiring” is decided by transport. | 第一条：搬动代替长线Clause one: motion instead of wires | poole2025rydberg, berthusen2025local · proposed |
| modular-networked | 把一块码或多块码分到几台处理器上，用量子链路补上跨块的腿。Split one or several blocks over processors and supply the cross-module legs through quantum links. | 第一条：切块加链路Clause one: modules plus links | yoder2025tour · proposed |
| memory | 反复跑症状电路，报告逻辑比特多久翻一次。Run the syndrome circuit repeatedly and report how often a logical qubit flips. | 第二至四条：六腿、辅助、深度 7Clauses two to four: six legs, ancillas, depth 7 | wang2026lowoverhead · demonstrated |
| modular-computation | 在 d = 12、18 的 BB 模块之间做逻辑门，有指令集与编译器。Logical gates between d = 12 and d = 18 BB modules, with an instruction set and compiler. | 契约之外：架构层Beyond the contract: architecture | yoder2025tour · proposed |
1.3把「144」这本账算全Completing the “144” ledger
卡片和论文最常被引用的一句是「十二倍」：144 个数据比特，旋转表面码存 1 个 d = 12 的逻辑比特，gross 存 12 个。这句话只比数据比特。按 1.1 节第三条款，gross 还要 144 个辅助比特，全账是 288 个物理比特；旋转表面码 d = 12 的辅助比特是 143 个（每条检查一个，d² − 1 条检查），全账 287。所以「十二倍」在全账上仍然近似成立——但这是码距相同时静态比特数的比较，没有算译码器、路由、逻辑门。论文的标题数字是另一种比法，来自电路级噪声下的数值模拟（arXiv 2308.07915 第 3、8 节）：每个操作以概率 p = 0.1% 独立出错的去极化电路噪声（定义见 4.2 节末尾）；gross 一侧用 MIN-SUM 置信传播加 combination-sweep 版本的 OSD 译码，288 个物理比特，估计每轮逻辑错误率约 2 × 10⁻⁷，论文由此估计能把 12 个逻辑比特保存近一百万轮；对照是 12 块独立的旋转表面码贴片（d = 9 到 15，标准症状电路，同样的噪声，数据来自作者之一与 Vargo 的模拟软件，论文此处没有写明表面码一侧的译码器），要把每轮错误率从 10⁻³ 压到 10⁻⁶ 需要近 3000 个物理比特。论文据此说节省超过 10 倍；两边的目标错误率并不相同（约 2 × 10⁻⁷ 对 10⁻⁶），所以这是近似的比较。反过来，第 3 章的昆仑实验用了 32 个 transmon（目前最常用的一种超导量子比特）跑一个 n = 18 的码：32 是整台设备的数目（含它选择的辅助资源），18 是静态数据比特的参数。实现账本特别叮嘱：32 不能和 gross 的 144 直接比——一个是设备实现，一个是矩阵参数。下面的图是数据比特账：横轴数据比特数，纵轴逻辑比特数，把鼠标放到点上看 k·d²/n。
The most quoted sentence about the card and the paper is “twelve-fold”: with 144 data qubits a rotated surface code stores 1 logical qubit at d = 12, the gross code stores 12. That sentence compares data qubits only. By clause three of §1.1 gross also needs 144 ancillas, so the full ledger is 288 physical qubits; a d = 12 rotated surface code needs 143 ancillas (one per check, d² − 1 checks), full ledger 287. So “twelve-fold” still roughly holds on the full ledger, but it is a comparison of static qubit counts at equal distance: no decoder, routing or logical gates included. The paper's headline number compares differently and comes from numerical simulation under circuit-level noise (arXiv 2308.07915, sections 3 and 8): depolarizing circuit noise in which every operation fails independently with probability p = 0.1% (defined at the end of §4.2); on the gross side, MIN-SUM belief propagation with the combination-sweep version of OSD as decoder, 288 physical qubits, an estimated logical error rate of about 2 × 10⁻⁷ per cycle, from which the paper estimates that 12 logical qubits survive nearly one million cycles; the comparator is 12 separate rotated surface-code patches (d = 9 to 15, the standard syndrome circuit, the same noise, data from simulation software by one of the authors and Vargo; the paper does not name the surface-code decoder at this point), which need nearly 3000 physical qubits to push the per-cycle error rate from 10⁻³ to 10⁻⁶. On this basis the paper claims a saving of more than 10 times; the two target error rates differ (about 2 × 10⁻⁷ versus 10⁻⁶), so the comparison is approximate. Conversely, the Kunlun run of Chapter 3 used 32 transmons (the most widely used kind of superconducting qubit) for an n = 18 code: 32 is the whole device (including its chosen ancilla resources), 18 is a static data-qubit parameter. The realization ledger insists: 32 must not be compared directly with gross's 144; one is a device implementation, the other a matrix parameter. The chart below is the data-qubit ledger: data qubits across, logical qubits up; hover a point for k·d²/n.
记号：k·d²/n = 逻辑比特数乘码距平方再除以数据比特数，是比较有限码的一个指标：存了几个、保护多强、花了几个，合成一个数。它和 BPT 界的关系是：对比特排在二维格子上、单位面积比特数有上限、每条检查只碰固定距离以内的比特的码族，BPT 界（《BB 码 · 高中数学版》1.1 节）说 k·d² ≤ c·n，即这个比值不超过常数 c（c 只取决于检查的作用范围和每个格点的维数）；某一块码算出的 k·d²/n 只是一个具体数，不是 c 的「实测值」；143 = 12² − 1，287 = 144 + 143，均为本页算的，旋转表面码的比特账见表面码实现页第 4 章。
Notation: k·d²/n = logical qubits times distance squared over data qubits, a metric for comparing finite codes: how many stored, how well protected, at what cost, folded into one number. Its relation to the BPT bound: for code families whose qubits sit on a 2D lattice with a bounded number per unit area and whose checks touch only qubits within a fixed distance, the BPT bound (§1.1 of “BB Codes · High-School Edition”) says k·d² ≤ c·n, i.e. this ratio stays below a constant c (c depends only on the check range and the dimension per site); the k·d²/n of one particular code is just a number, not a “measured value” of c; 143 = 12² − 1 and 287 = 144 + 143 are this page's arithmetic, the rotated-surface qubit ledger is in Chapter 4 of the surface realizations page.
BB 码的契约比表面码多要一层耦合、每条检查多两条腿、每轮多三层门。卡片的三个平台标签是三种付法：长线、搬动、切块。三种里目前只有「长线」被真机兑现过一次，而且兑现的是 n = 18 的小块，不是 144。
The BB contract asks for one more coupling layer than the surface code, two more legs per check and three more gate layers per round. The card's three platform tags are three ways to pay: long wires, motion, modules. Of the three, only “long wires” has been honoured by a real machine so far, once, and for an n = 18 block rather than 144.
怎样读一条 BB 实验记录：五个字段，三句话How to read a BB experiment record: five fields, three sentences
表面码那边的读法是「每轮逻辑错误率、码距缩放、Λ」（《Surface Code · 用例与实现》第 2 章）。BB 码多了一个麻烦：一块码里有好几个逻辑比特，而且「BB」是一族码、几十种变体。QEC-Bank 的实现账本因此规定：一条 BB 记录要交代五个字段，否则「BB 做出来了」这句话粗到没法比较。 On the surface-code side the reading rule is “logical error per cycle, distance scaling, Λ” (Chapter 2 of “Surface Code · Use Cases & Realizations”). BB codes add a complication: one block holds several logical qubits, and “BB” names a family with dozens of variants. The QEC-Bank realization ledger therefore rules that a BB record must state five fields; without them, “BB has been demonstrated” is too coarse to compare.
2.1五个字段The five fields
实现账本的「更新规则」逐字如下，每条后面是人话。① 精确的 BB 实例，以及它是普通的、自对偶的、互素的、剪枝的还是变形的——「BB」不是一个码，[[18,4,4]] 和 [[144,12,12]] 是两块完全不同的矩阵；自对偶、剪枝等变体连检查的形状都变了（关系页第 4 章）。② 数据、辅助、通信、总设备数分开报——不然 32 与 144 就会被误比。③ 提取电路的调度与重复的轮数——深度几、跑了几轮，决定这是「测了一次」还是「当存储器用了」。④ 译码器与噪声 / 归一化约定——同一台机器换个译码器，数字就变（《译码器 · 高中数学版》6.1 节「一个数字，五个限定项」）。⑤ 结果属于哪一类：探测、纠错、随码距缩放、态制备，还是逻辑操作——五种是五个不同强度的话，下一节展开。
The ledger's “update rule”, verbatim, each followed by plain words. ① The exact BB instance and whether it is ordinary, self-dual, coprime, pruned or morphing: “BB” is not one code; [[18,4,4]] and [[144,12,12]] are two entirely different matrices, and self-dual or pruned variants change even the shape of the checks (Chapter 4 of the relations page). ② Data, ancilla, communication and total device counts, separately: otherwise 32 gets compared with 144. ③ The extraction schedule and the number of repeated rounds: how deep and how many rounds decide whether this was “measured once” or “used as a memory”. ④ Decoder and noise/normalization convention: change the decoder on the same machine and the number changes (§6.1 of “Decoders · High-School Edition”, “one number, five qualifiers”). ⑤ Which kind of result it is: detection, correction, scaling, state preparation or a logical operation: five sentences of five different strengths, unfolded in the next section.
调度与轮数schedule & rounds , 译码器与噪声约定decoder & noise convention , 结果类别result class )
2.2「每个逻辑比特每轮」是什么意思What “per logical qubit per cycle” means
表面码实验报告的 εL每轮逻辑错误率（logical error per cycle）：跑一轮纠错循环后逻辑比特被翻转的概率，由多轮衰减曲线拟合得到；定义见《Surface Code · 用例与实现》2.1 节。 是「这一个逻辑比特每轮翻转的概率」（2.1 节）。BB 块里有 k 个逻辑比特——昆仑的 [[18,4,4]] 有 4 个——所以卡片写的是「每个逻辑比特每轮的逻辑错误率 (8.91 ± 0.17)%」：把整块的失败按逻辑比特归一化后的数字。人话：按逻辑比特平均后，量级是「每个逻辑比特每轮约 8.9%」（卡片没给归一化公式，所以不能直接当成某一个比特的翻转概率）；「±0.17%」是卡片登记的不确定度，卡片没有说明它是哪种误差棒。卡片没有给出整块层面的原始数字，也没有给出归一化的公式，本页不替论文重建它。比较时还要问一轮多长——超导芯片一轮约一微秒（表面码实现页用的量级），中性原子慢得多——卡片同样没有登记这个时长。
A surface-code experiment reports εLLogical error per cycle: the probability that the logical qubit flips over one correction cycle, fitted from a multi-cycle decay curve; defined in §2.1 of “Surface Code · Use Cases & Realizations”., “the probability that this one logical qubit flips per cycle” (§2.1). A BB block holds k logical qubits, four for Kunlun's [[18,4,4]], so the card writes “logical error per logical qubit per cycle (8.91 ± 0.17)%”: the block's failure normalised per logical qubit. In plain words: averaged per logical qubit it is of the order “about 8.9% per logical qubit per round” (the card gives no normalisation formula, so it is not literally one qubit's flip probability); “±0.17%” is the uncertainty the card records, with no statement of which error-bar convention it follows. The card gives neither the raw block-level number nor the normalisation formula, and this page does not reconstruct it for the paper. When comparing, also ask how long a cycle is (about a microsecond on superconducting chips, the order of magnitude used on the surface-code realizations page; far longer for neutral atoms); the card does not register that either.
k = 4
整块原始数字：卡片未给raw block-level number: not on the card
记号：ε逻辑比特·轮 = 每个逻辑比特每轮的逻辑错误率（卡片原话「logical error per logical qubit per cycle」）；± = 读「正负」，后面的数是卡片登记的不确定度（约定未注明）；[[18,4,4]] = n 18 个数据比特、k 4 个逻辑比特、码距 d 4。
Notation: εlogical·cycle = logical error per logical qubit per cycle (the card's words); ± = read “plus or minus”, the number after it is the recorded uncertainty (convention not stated); [[18,4,4]] = n 18 data qubits, k 4 logical qubits, distance d 4.
2.3三句强度不同的话Three sentences of different strength
表面码那页把「越大越好」「低于阈值」「超过最好的物理比特」分成三句（2.3 节）。BB 这里对应的三句是：「可行」——契约的前两条款在真机上兑现过，症状电路也重复跑了：非局域六腿检查全部测了；辅助比特怎么分配、电路多深，卡片没有登记。「随码距压制」——实现账本的原话：「需要至少两个或更多码距，在可比的电路、噪声与译码器下，逻辑错误随码距增长而下降；一个固定的 [[18,4,4]] 点提供不了这个推断。」「低于阈值」——比第二句更强，要在多个码距上稳定地看到压制因子 Λ 大于 1（2.2 节）。此外 BB 还有第四句「跑了 gross」和第五句「做了容错逻辑门」。昆仑记录只说了第一句。下一章逐字核对。
The surface page separates “bigger is better”, “below threshold” and “beyond the best physical qubit” (§2.3). The BB counterparts are: “feasible”: the first two clauses of the contract were honoured on a real machine and the syndrome circuit was repeated: every nonlocal six-leg check measured; how the ancillas were assigned and how deep the circuit was, the card does not record. “Suppressed with distance”: in the ledger's words, “a below-threshold scaling demonstration would require at least two or more distances under comparable circuits, noise, and decoding, with logical error decreasing as distance grows. One fixed [[18,4,4]] point cannot supply that inference.” “Below threshold”: stronger still, a suppression factor Λ stably above 1 across several distances (§2.2). BB adds a fourth sentence, “ran gross”, and a fifth, “performed a fault-tolerant logical gate”. The Kunlun record says only the first. The next chapter checks it word by word.
| 这句话Sentence | 需要的证据Evidence required | 昆仑记录说了吗Does the Kunlun record say it? |
|---|---|---|
| 可行feasible | 非局域六腿检查全部测出、症状电路重复多轮all nonlocal six-leg checks measured, syndrome circuit repeated | 是（卡片原话「establishes feasibility」）Yes (card: “establishes feasibility”) |
| 随码距压制suppressed with distance | ≥ 2 个码距、可比的电路 / 噪声 / 译码器、错误率下降≥ 2 distances, comparable circuit / noise / decoder, error falling | 否：只有一个 d = 4 的点No: a single d = 4 point |
| 低于阈值below threshold | 多个码距上稳定的 Λ > 1stable Λ > 1 over several distances | 否（卡片原话「not below-threshold scaling」）No (card: “not below-threshold scaling”) |
| 跑了 grossran gross | [[144,12,12]] 的 144 条检查在真机上测量the 144 checks of [[144,12,12]] measured on hardware | 否（卡片原话「not a gross-code run」）No (card: “not a gross-code run”) |
| 容错逻辑门fault-tolerant logical gate | 逻辑比特之间的门，带容错的输入与译码a gate between logical qubits with fault-tolerant input and decoding | 否（实现账本「did not establish」列）No (ledger, “did not establish” column) |
记号：Λ = 压制因子，码距加 2 时每轮逻辑错误率缩小的倍数，是设备加译码器的拟合值而不是阈值除以物理错误率（《译码器 · 高中数学版》6.4 节）；d = 码距。
Notation: Λ = suppression factor, how many times the logical error per cycle shrinks when the distance grows by 2, a device-plus-decoder fit and not threshold over physical error rate (§6.4 of “Decoders · High-School Edition”); d = code distance.
① 哪一块 BB，普通的还是变体？② 数据、辅助、通信、总数各多少？③ 电路多深、跑了几轮？④ 哪个译码器、噪声怎么归一化？⑤ 说的是可行、压制、低于阈值、态制备还是逻辑门？带着五问翻到下一章。
① Which BB block, ordinary or a variant? ② How many data, ancilla, communication and total qubits? ③ How deep a circuit, how many rounds? ④ Which decoder, how is noise normalised? ⑤ Feasibility, suppression, below threshold, state preparation or a logical gate? Take the five into the next chapter.
唯一的 demonstrated：昆仑处理器上的 [[18,4,4]]The only demonstrated record: [[18,4,4]] on the Kunlun processor
卡片的 realizations 字段有五条记录，带 demonstrated 标签的只有一条。先逐字抄下它，再用第 2 章的五个字段把它拆开：证明了什么、没证明什么、哪几个数字不能互相比。 The card's realizations field holds five records; exactly one carries the demonstrated label. We copy it word for word, then take it apart with the five fields of Chapter 2: what it established, what it did not, and which numbers must not be compared with each other.
3.1记录原文The record, verbatim
| 字段Field | 卡片内容（原文 / 译文）Card content (verbatim / translation) |
|---|---|
| platform | 「Kunlun long-range-coupled superconducting processor」—— 昆仑长程耦合超导处理器“Kunlun long-range-coupled superconducting processor” |
| status | demonstrated |
| description | 「一个 [[18,4,4]] 的 BB 块用 32 个 transmon 执行了全部非局域的六腿检查和重复的症状循环。报告的每个逻辑比特每轮逻辑错误率为 (8.91 ± 0.17)%；这确立了可行性，不是低于阈值的缩放，也不是一次 gross 码的运行。」“A [[18,4,4]] BB block used 32 transmons to execute all nonlocal weight-six checks and repeated syndrome cycles. The reported logical error per logical qubit per cycle was (8.91 +/- 0.17)%; this establishes feasibility, not below-threshold scaling and not a gross-code run.” |
| refs | wang2026lowoverhead —— 登记表里此键尚无标题作者年份（「metadata pending」）。据文献扫描报告，登记待补：Ke Wang 等，“Demonstration of Low-Overhead Quantum Error Correction Codes”，arXiv 2505.09684。wang2026lowoverhead, a key with no title, authors or year in the registry yet (“metadata pending”). From the scout report, registration pending: Ke Wang et al., “Demonstration of Low-Overhead Quantum Error Correction Codes”, arXiv 2505.09684. |
| 位置locator | bivariate_bicycle/card.yaml#/realizations/0 |
3.2用五个字段拆开Taken apart with the five fields
① 实例：[[18,4,4]]，即 n = 18 个数据比特、k = 4 个逻辑比特、码距 d = 4。它是一块普通的（非变体）BB 码，但不是 QEC-Bank 的任何一个实例：QEC-Bank 的家族条目只装了 gross [[144,12,12]] 与 toric_L3 [[18,2,3]]，卡片也没有登记这块码的 l、m、A、B。所以本页不猜它的多项式，也不用实验台重建它。注意 n = 18 与 toric_L3 的 n = 18 只是数字巧合——k 和 d 都不同。② 数目：数据 18，总设备 32；辅助与通信数目卡片没有分开给。32 − 18 = 14 是本页做的减法，只说明「设备里除数据比特外还有 14 个」，卡片没有说它们全是辅助比特。③ 调度与轮数：「全部非局域的六腿检查」都测了，「重复的症状循环」跑了；具体深度与轮数卡片没有登记。④ 译码器与噪声约定：卡片没有登记。⑤ 结果类别：纠错（有重复轮次、有每轮逻辑错误率），且明确不是缩放、不是低于阈值、不是逻辑操作。
① Instance: [[18,4,4]], i.e. n = 18 data qubits, k = 4 logical qubits, distance d = 4. It is an ordinary (non-variant) BB block, but not any QEC-Bank instance: the family entry ships only gross [[144,12,12]] and toric_L3 [[18,2,3]], and the card does not record this block's l, m, A, B. So this page neither guesses its polynomials nor rebuilds it on a bench. Note that its n = 18 coinciding with toric_L3's n = 18 is a numerical accident; k and d differ. ② Counts: data 18, total device 32; ancilla and communication counts are not given separately. 32 − 18 = 14 is this page's subtraction and says only “14 qubits in the device besides the data qubits”; the card does not say they are all ancillas. ③ Schedule and rounds: “all nonlocal weight-six checks” were measured and “repeated syndrome cycles” were run; depth and round count are not recorded. ④ Decoder and noise convention: not recorded. ⑤ Result class: correction (repeated rounds, a per-cycle logical error), and explicitly not scaling, not below threshold, not a logical operation.
k·d²/n = 4 × 16 / 18 ≈ 3.6 (本页算的；gross 为 12，表面码约 1this page's arithmetic; gross gives 12, surface codes about 1)
证明了什么、没证明什么，实现账本用两列写得很清楚。确立了：「全部非局域六腿检查与重复的症状循环；报告的每个逻辑比特每轮逻辑错误率 8.91% ± 0.17%」。也就是说，1.1 节契约里的长程的腿、六腿检查和重复调度第一次在同一台真机上一起兑现（辅助比特分配与电路深度卡片未登记）。没有确立：「gross [[144,12,12]]、随码距增大的压制、低于阈值的缩放，或一个容错逻辑门」。账本还补了一句只有 BB 才需要说的话：这次运行「没有提供一个家族的交叉点」——阈值是一族码在多个尺寸上曲线相交的位置（《BB 码 · 高中数学版》6.4 节），一个点画不出交叉。
What it did and did not establish, the realization ledger writes in two columns. Established: “all nonlocal weight-six checks and repeated syndrome cycles; reported logical error per logical qubit per cycle 8.91% ± 0.17%”. That is, the long legs, six-leg checks and repeated schedule of §1.1 were honoured together on one real machine for the first time (ancilla assignment and circuit depth are not recorded on the card). Did not establish: “gross [[144,12,12]], increasing-distance suppression, below-threshold scaling, or a fault-tolerant logical gate”. The ledger adds a sentence only BB needs: the run “does not provide a family crossing”; a threshold is where the curves of a family at several sizes cross (§6.4 of “BB Codes · High-School Edition”), and one point cannot draw a crossing.
3.3与 Willow 并排放，但不要相除Side by side with Willow, but do not divide
表面码卡片上最强的一条记录是 Google Willow：d = 7 的贴片每轮逻辑错误 0.143% ± 0.003%，压制因子 Λ = 2.14 ± 0.02（google2024below，见表面码实现页 3.2 节的数字表）。把 8.91% 和 0.143% 放在一起，很容易得出「BB 差六十倍」。这个除法不成立，原因有四：不同的码（[[18,4,4]] 对旋转表面码 d = 7）；不同的设备与时代（一次首次运行对一个做了三代的平台）；不同的量（每个逻辑比特每轮，块里 4 个逻辑比特，对单个逻辑比特每轮）；不同的电路与译码器。《译码器 · 高中数学版》6.1 节的规则在这里同样适用：换掉任何一个限定项，就是另一个实验。两条记录能并排讲的只有一件事——它们各自的状态标签：Willow 的是「低于阈值的存储」，昆仑的是「可行」。
The strongest record on the surface-code card is Google's Willow: a d = 7 patch at 0.143% ± 0.003% logical error per cycle with suppression factor Λ = 2.14 ± 0.02 (google2024below; see the table of numbers in §3.2 of the surface realizations page). Put 8.91% next to 0.143% and “BB is sixty times worse” suggests itself. That division does not hold, for four reasons: different codes ([[18,4,4]] versus a rotated surface patch at d = 7); different devices and eras (a first run versus a platform in its third generation); different quantities (per logical qubit per cycle with four logical qubits in the block, versus one logical qubit per cycle); different circuits and decoders. The rule of §6.1 of “Decoders · High-School Edition” applies: change any qualifier and it is a different experiment. The one thing the two records can share a sentence about is their status label: Willow's is “below-threshold memory”, Kunlun's is “feasible”.
| 昆仑 · BB [[18,4,4]]Kunlun · BB [[18,4,4]] | Willow · 旋转表面码 d = 7Willow · rotated surface d = 7 | |
|---|---|---|
| 卡片Card | bivariate_bicycle | surface |
| 报告的量Quantity reported | 每个逻辑比特每轮 (8.91 ± 0.17)%（k = 4）(8.91 ± 0.17)% per logical qubit per cycle (k = 4) | 每轮 0.143% ± 0.003%（k = 1）；Λ = 2.14 ± 0.020.143% ± 0.003% per cycle (k = 1); Λ = 2.14 ± 0.02 |
| 码距Distances | 一个：4one: 4 | 三个：3、5、7three: 3, 5, 7 |
| 设备比特Device qubits | 32 | 101（文献笔记：49 数据 + 48 测量 + 4 泄漏清除）101 (literature notes: 49 data + 48 measure + 4 leakage removal) |
| 卡片状态Card status | demonstrated · 可行feasibility | demonstrated · 低于阈值的存储below-threshold memory |
| 能否相除May the two be divided? | 不能：码、设备、量、电路与译码器四项全不同。No: code, device, quantity, circuit and decoder all differ. | |
3.4六腿检查长什么样：在实验台上数腿What a six-leg check looks like: count legs on the bench
昆仑实验的关键词是「全部非局域的六腿检查」。[[18,4,4]] 的多项式不在 QEC-Bank 数据里，本页不猜；但 Table 3 的 [[72,12,6]] 用的正是 gross 的两个多项式（6 × 6 环面），可以借它看清「非局域六腿」是什么意思。在下面的实验台上点任意一条 X 检查：左层三条腿来自 A = x³ + y + y²（右三格、上一格、上两格），右层三条腿来自 B = y³ + x + x²。图上实心点是左层比特、空心点是右层比特，横轴 i 向右、纵轴 j 向上，高亮的腿旁标着比特编号。「往右三格」「往上三格」就是需要长程耦合器的那两条腿。再切到「看一个比特」，数它被几条检查碰到——3 + 3。
The key phrase of the Kunlun run is “all nonlocal weight-six checks”. The polynomials of [[18,4,4]] are not QEC-Bank data and this page will not guess them; but Table 3's [[72,12,6]] uses gross's two polynomials on a 6 × 6 torus, so it can show what “nonlocal six-leg” means. Click any X check on the bench below: three left-layer legs come from A = x³ + y + y² (three right, one up, two up), three right-layer legs from B = y³ + x + x². In the picture filled dots are left-layer qubits and hollow dots right-layer qubits, the horizontal axis i points right and the vertical axis j up, and each highlighted leg carries its qubit index. “Three to the right” and “three up” are the two legs that need long-range couplers. Then switch to the single-qubit view and count how many checks touch it: 3 + 3.
对。卡片原话是「establishes feasibility, not below-threshold scaling and not a gross-code run」。一个 d = 4 的点画不出阈值交叉；32 是 [[18,4,4]] 这块小码的设备数，与 gross 的 144 / 288 无关。
Right. The card says “establishes feasibility, not below-threshold scaling and not a gross-code run”. A single d = 4 point cannot draw a threshold crossing; 32 is the device count for the small [[18,4,4]] block and has nothing to do with gross's 144 / 288.
回到 3.1 节的原文和 2.3 节的表：五句话里昆仑只说了「可行」。再看 1.3 节为什么 32 不能和 144 比。
Back to the verbatim record in §3.1 and the table in §2.3: of the five sentences Kunlun says only “feasible”. Then reread §1.3 on why 32 must not be compared with 144.
demonstrated 的意思是「有一篇被引用的实验论文报告了此事」。QEC-Bank 机器不重算任何硬件数字：它重算的是两张矩阵、n、k、检查与比特的度、gross 的秩 66 与商维数 6、重量 12 的上界见证，以及 toric_L3 的精确码距（推导页的 provenance split）。8.91%、0.17%、32、[[18,4,4]] 全是文献值，本页原样转抄。文献键 wang2026lowoverhead 在登记表里还没有元数据；标题与 arXiv 号来自文献扫描报告。
demonstrated means “a cited experimental paper reported this”. The QEC-Bank machine does not recompute any hardware number: it recomputes the two matrices, n, k, check and qubit degrees, gross's rank 66 and quotient dimension 6, the weight-12 upper witness and toric_L3's exact distance (the provenance split on the derivations page). 8.91%, 0.17%, 32 and [[18,4,4]] are literature values, copied as they stand. The key wang2026lowoverhead has no metadata in the registry yet; title and arXiv id come from the scout report.
四条 proposed：每一条在哪一层成立Four proposed records: at which layer each one holds
proposed 的意思是「设计具体到可以模拟或算成本，但没有物理系统执行过」。四条提案攻的是流水线上不同的瓶颈，因此不是同一个探测器模型的四种可互换实现。先看它们各自钉在哪一层，再逐条读卡片原文与账本的「确立 / 未确立」两列。 proposed means “concrete enough to simulate or cost, but never executed by a physical system”. The four proposals attack different bottlenecks in the pipeline, so they are not four interchangeable implementations of one detector model. First see where each is pinned, then read the card's words and the ledger's “established / did not establish” columns one by one.
4.1从矩阵到机器的流水线，五条记录各钉一层The matrix-to-machine pipeline, each record pinned to a layer
4.2逐条展开：卡片原文与账本两列One record at a time: card words and the ledger's two columns
优化的 Rydberg 中性原子版图 · poole2025rydbergOptimized Rydberg neutral-atom layout · poole2025rydberg
卡片原文：「门的布线与 Rydberg 相互作用为 BB 的连接性共同设计。结果是一个数值上的架构提案，而不是实验室里的逻辑存储演示。」账本：确立了「为 BB 连接性做的门 / 版图优化」；未确立「实验室逻辑存储」。人话：中性原子靠 Rydberg 态（原子被激光激发到的一种电子轨道极大的高能态，两个这样的原子靠近时会强烈相互作用）做两比特门，这篇论文把原子排在哪里、哪些门先做，按 gross 那张度 6 的 Tanner 图算了一遍最优解——攻的是「版图」这一层，让 Tanner 图实现得快。它没有搬一个原子。文献：据文献扫描报告，登记待补：C. Poole, T. M. Graham, M. A. Perlin, M. Otten, M. Saffman，“Architecture for Fast Implementation of Quantum Low-Density Parity-Check Codes with Optimized Rydberg Gates”，arXiv 2404.18809。
Card: “Gate routing and Rydberg interactions were co-designed for BB connectivity. The result is a numerical architecture proposal rather than a laboratory logical-memory demonstration.” Ledger: established “gate/layout optimization for BB connectivity”; did not establish “laboratory logical memory”. Plain words: neutral atoms do two-qubit gates through Rydberg-state interactions (a Rydberg state is a highly excited state with a very large electron orbit, reached by laser; two such atoms close together interact strongly); this paper computes where to put the atoms and which gates go first, optimised for gross's degree-6 Tanner graph. It attacks the layout layer: realise the Tanner graph fast. No atom was moved. Reference: from the scout report, registration pending: C. Poole, T. M. Graham, M. A. Perlin, M. Otten and M. Saffman, “Architecture for Fast Implementation of Quantum Low-Density Parity-Check Codes with Optimized Rydberg Gates”, arXiv 2404.18809.
分层的二维硬件 · berthusen2025localLayered two-dimensional hardware · berthusen2025local
卡片原文：「用搬动或通信把长程的 BB 检查嵌进一台局域连接的设备，包括让某些代价高的检查测得少一些的调度。改变了的节拍与电路噪声必须作为提案的一部分被译码。」账本：确立了「量化的搬动 / 通信代价与改变的检查节拍」；未确立「探测器模型不变，或免费的局域化」。人话：如果芯片只有最近邻连线，就把远处的腿用搬动或量子通信补上，代价是时间；再省一点，就让最贵的几条检查隔几轮才测一次。但「隔几轮测一次」改变了探测器（1.1 节的定义）。若一条检查每 2 轮才测一次，它的探测器只能比较 st ⊕ st−2：两次测量之间发生的故障要到下一次测量才显现，分不清是在哪一轮；两次测量之间若有两个故障各翻了这条检查的一个比特，这条检查的读数不变，它的探测器根本不亮（在每轮都测的电路里，两故障落在不同轮时它会亮两次）。探测器变少、每个探测器看的时间窗变长，「哪种故障点亮哪些探测器」这张表就变了，译码器看到的不再是深度 7 那张图——所以这篇的阈值数字属于它自己的电路与译码器，不能拿 0.8% 来套。它攻的是「版图」与「电路节拍」两层。文献：据文献扫描报告，登记待补：N. Berthusen 等，“Toward a 2D Local Implementation of Quantum Low-Density Parity-Check Codes”，arXiv 2404.17676。
Card: “Motion or communication embeds long-range BB checks in a locally connected device, including schedules that measure some costly checks less often. The altered cadence and circuit noise must be decoded as part of the proposal.” Ledger: established “quantified motion/communication and altered check cadence”; did not establish “unchanged detector model or free localization”. Plain words: if the chip has only nearest-neighbour wiring, supply the far legs by motion or quantum communication and pay in time; to save more, measure the most expensive checks only every few rounds. But “every few rounds” changes the detectors (defined in §1.1). If a check is measured only every 2 rounds, its detector can only compare st ⊕ st−2: a fault between the two measurements shows up only at the next one, with no way to tell which round it happened in; and if two faults between the measurements each flip one qubit of that check, its outcome does not change and its detector never lights (in a circuit that measures every round, the two faults would light it twice when they fall in different rounds). Fewer detectors, each watching a longer time window: the table of which fault lights which detectors changes, and the decoder no longer sees the depth-7 graph, so this paper's threshold numbers belong to its own circuit and decoder and 0.8% cannot be pasted onto it. It attacks the layout and circuit-cadence layers. Reference: from the scout report, registration pending: N. Berthusen et al., “Toward a 2D Local Implementation of Quantum Low-Density Parity-Check Codes”, arXiv 2404.17676.
度 5 的变形电路版图 · shaw2025morphingDegree-five morphing-circuit layout · shaw2025morphing
卡片原文：「一个相关的 BB 家族把连接度从 6 降到 5，并通过在提取期间让码变形而只用六轮 CNOT。它改变了家族与探测器模型；它不是每一块 BB 码的更便宜调度。」账本：确立了「六轮 CNOT、更低连接度、与表面码之间的输入 / 输出通路」；未确立「对每一块 BB 的普适重排」。人话：「变形」是让码在一轮测量中途换成另一个码再换回来——测量一半时芯片上「活着」的稳定子群不是 gross 的那一组。所以它每个比特只要 5 根线、每轮只要 6 层门，但代价是这是另一族码、另一套探测器；它不能拿来给 gross 省一层。它钉在「Tanner 图」和「电路」两层。文献：据文献扫描报告，登记待补：M. H. Shaw, B. M. Terhal，“Lowering Connectivity Requirements for Bivariate Bicycle Codes Using Morphing Circuits”，arXiv 2407.16336。它同时是表示阶梯页 R4 那一格的第二个文献键。
Card: “A related BB family lowers connectivity from degree six to five and uses six CNOT rounds by morphing the code during extraction. It changes the family and detector model; it is not a cheaper schedule for every BB block.” Ledger: established “six CNOT rounds, lower connectivity, surface-code input/output route”; did not establish “a universal reschedule of every BB block”. Plain words: “morphing” swaps the code for another one midway through a measurement round and back; halfway through, the stabilizer group alive on the chip is not gross's. So each qubit needs only 5 wires and each round only 6 gate layers, but the price is that this is a different family with different detectors; it cannot be used to save gross a layer. It is pinned to both the Tanner-graph and circuit layers. Reference: from the scout report, registration pending: M. H. Shaw and B. M. Terhal, “Lowering Connectivity Requirements for Bivariate Bicycle Codes Using Morphing Circuits”, arXiv 2407.16336. It is also the second bibkey of the R4 rung on the representation-ladder page.
模块化 gross 码架构 · yoder2025tourModular gross-code architecture · yoder2025tour
卡片原文：「一套指令集、编译器与端到端的资源模型把码距 12 与码距 18 的 BB 模块组织成一台计算机。这填上了一个架构空白，但仍是提案，不是硬件实现。」账本：确立了「指令集、编译器与端到端资源估计」；未确立「执行过的模块或逻辑门」。人话：gross [[144,12,12]] 与 [[288,12,18]]（《BB 码 · 高中数学版》5.7 节）是两种「内存条」，这篇论文写的是主板与操作系统：模块之间怎么连、逻辑门怎么编译成跨块的测量（逻辑操作页五条 claimed 记录里有两条引用它）、一整个算法要多少比特多少时间。它是卡片上 modular-networked 与 modular-computation 两个标签的唯一支撑，钉在流水线最右端。文献：据文献扫描报告，登记待补：T. J. Yoder 等，“Tour de Gross: A Modular Quantum Computer Based on Bivariate Bicycle Codes”，arXiv 2506.03094。
Card: “An instruction set, compiler, and end-to-end resource model organize distance-12 and distance-18 BB modules into a computer. This closes an architecture gap but remains a proposal, not a hardware realization.” Ledger: established “instruction set, compiler, and end-to-end resource estimates”; did not establish “executed module or logical gate”. Plain words: gross [[144,12,12]] and [[288,12,18]] (§5.7 of “BB Codes · High-School Edition”) are two kinds of memory stick; this paper writes the motherboard and operating system: how modules connect, how logical gates compile into cross-block measurements (two of the five claimed records on the logical-operations page cite it), how many qubits and how much time a whole algorithm takes. It is the sole backing of the modular-networked and modular-computation tags and sits at the right end of the pipeline. Reference: from the scout report, registration pending: T. J. Yoder et al., “Tour de Gross: A Modular Quantum Computer Based on Bivariate Bicycle Codes”, arXiv 2506.03094.
实现账本的原话：「这些不是同一个探测器模型的可互换实现。搬动会增加空闲错误；变形改变了哪一个稳定子码在活动；光子的损耗信道不同于 transmon 的退极化模型；网络化的切分引入链路噪声。每一个都需要自己的电路与译码器声明。」换成人话：四篇论文里的任何一个阈值或错误率数字，都只属于那篇论文自己的电路加译码器，不能挪到另一篇上，更不能挪到 0.8% 那一行（译码器页）。引文里的「退极化模型」是模拟用的噪声模型，定义要写全：一个单比特位置（空等、单比特门）以 1 − p 的概率不出错，以 p/3 的概率各出 X、Y、Z 之一；一个出错的两比特门（例如 CNOT）在门后以 p/15 的概率各出 15 种非恒等的两比特 Pauli 乘积之一（每个比特 I、X、Y、Z 四选一，去掉 I⊗I，共 4 × 4 − 1 = 15 种）。Bravyi 等（arXiv 2308.07915 第 6 节）的电路噪声就是这样定义的，另加：制备出错 = 制成正交的态，测量出错 = 读数翻转。它是为了便于模拟而设的理想化模型，不是 transmon 真实噪声的描述：真实器件的错误种类与比例要从实验中测，不一定对称，也不一定彼此独立。
The ledger's words: “These are not interchangeable implementations of an identical detector model. Movement can add idle faults; morphing changes which stabilizer code is active; a photonic loss channel differs from a transmon depolarizing model; a networked partition introduces link noise. Each needs its own circuit and decoder claim.” In plain words: any threshold or error-rate number in one of the four papers belongs to that paper's own circuit plus decoder; it cannot be moved to another paper, still less to the 0.8% row (decoders page). The “depolarizing model” in the quote is a simulation noise model, and its definition should be complete: a single-qubit location (idling, a single-qubit gate) is error-free with probability 1 − p and suffers X, Y or Z with probability p/3 each; a faulty two-qubit gate (a CNOT, say) is followed by one of the 15 non-identity two-qubit Pauli products with probability p/15 each (I, X, Y or Z on each qubit, minus I⊗I: 4 × 4 − 1 = 15). The circuit noise of Bravyi et al. (arXiv 2308.07915, section 6) is defined exactly so, plus: a faulty preparation makes the orthogonal state, a faulty measurement flips the outcome. It is an idealised model chosen to make simulation tractable, not a description of real transmon noise: the error types and rates of a real device have to be measured, and need not be symmetric or independent.
4.3账本里有、卡片上没有的三行Three rows in the ledger that are not on the card
QEC-Bank 的实现账本比卡片多三行，都是 proposed，可信级别低一层——它们是策展人的记录，不是条目的断言。互素子类与冷原子版图（wang2026coprime）：限制多项式的因子让码率可以在搜索前先选定，并为搬动原子的版图共同设计；未做硬件实验。发射体产生的光子融合资源（chen2025fusion）：把 CSS qLDPC 的检查翻译成光子资源态与一张考虑损耗的融合网络，研究了小 BB 例子；没有光子 BB 实验。分布式 gross 块（chandra2026distributed）：把一块 [[144,12,12]] 切到 4、6、12 台处理器上，用 Bell 对（两个处理器之间共享的一对最大纠缠比特，用来隔空做门）连接，模拟 BP-OSD 对非局域链路噪声的敏感度；没有分布式硬件运行。三个键都在卡片的 refs 列表里、都「metadata pending」，但不在 realizations 字段里；标题与 arXiv 号（2408.10001、2509.17223、2605.04663）来自文献扫描报告。
The QEC-Bank realization ledger has three more rows than the card, all proposed and one tier lower in trust: they are the curator's records, not assertions of the entry. The coprime subclass with cold-atom layouts (wang2026coprime): restrict the polynomials' factors so the rate can be chosen before the search, co-designed with a moving-atom layout; no hardware experiment. Emitter-generated photonic fusion resources (chen2025fusion): translate CSS qLDPC checks into photonic resource states and a loss-aware fusion network, studying small BB examples; no photonic BB experiment. A distributed gross block (chandra2026distributed): split one [[144,12,12]] block over 4, 6 and 12 processors linked by Bell pairs (a maximally entangled pair of qubits shared between two processors, used to perform gates across the link) and simulate BP-OSD's sensitivity to nonlocal link noise; no distributed hardware run. All three keys sit in the card's refs list, all “metadata pending”, but not in the realizations field; titles and arXiv ids (2408.10001, 2509.17223, 2605.04663) come from the scout report.
| 来源Source | 平台 / 块Platform / block | 状态Status | 确立了Established | 未确立Did not establish | 在卡片上？On the card? |
|---|---|---|---|---|---|
| wang2026lowoverhead | 昆仑，[[18,4,4]]，32 个长程耦合 transmonKunlun, [[18,4,4]], 32 long-range-coupled transmons | demonstrated | 全部非局域六腿检查；重复症状循环；(8.91 ± 0.17)% 每逻辑比特每轮all nonlocal six-leg checks; repeated cycles; (8.91 ± 0.17)% per logical qubit per cycle | gross；随码距压制；低于阈值；容错逻辑门gross; distance suppression; below threshold; FT logical gate | 是yes |
| poole2025rydberg | 优化的 Rydberg 中性原子版图optimized Rydberg neutral-atom layout | proposed | 为 BB 连接性优化门与版图gate/layout optimization for BB connectivity | 实验室逻辑存储laboratory logical memory | 是yes |
| berthusen2025local | 分层 / 局域的二维实现layered/local two-dimensional implementation | proposed | 量化的搬动 / 通信代价与改变的检查节拍quantified motion/communication and altered check cadence | 探测器模型不变；免费的局域化unchanged detector model; free localization | 是yes |
| shaw2025morphing | 度 5 的变形家族degree-five morphing family | proposed | 六轮 CNOT；更低连接度；与表面码的输入 / 输出通路six CNOT rounds; lower connectivity; surface-code I/O route | 对每一块 BB 的普适重排a universal reschedule of every BB block | 是yes |
| yoder2025tour | 模块化 gross 家族计算机modular gross-family computer | proposed | 指令集、编译器、端到端资源估计instruction set, compiler, end-to-end resource estimates | 执行过的模块或逻辑门executed module or logical gate | 是yes |
| wang2026coprime | 互素子类，冷原子coprime subclass on cold atoms | proposed | 码率可先选的子类与原子搬动共同设计rate-aware subclass and atom-movement co-design | 硬件实验hardware experiment | 否（仅账本）no (ledger only) |
| chen2025fusion | 发射体产生的光子融合资源emitter-generated photonic fusion resources | proposed | CSS qLDPC 检查的映射；小 BB 例子的损耗 / 噪声研究mapping of CSS qLDPC checks; small-BB loss/noise studies | 光子 BB 实验photonic BB experiment | 否（仅账本）no (ledger only) |
| chandra2026distributed | 跨几台处理器的网络化 gross 块networked gross block over several processors | proposed | Bell 链路切分；BP-OSD 对非局域噪声敏感度的模拟Bell-link partition; simulated BP-OSD sensitivity to nonlocal noise | 分布式硬件运行distributed hardware run | 否（仅账本）no (ledger only) |
表格前五行逐字译自 codes/bivariate_bicycle/pedagogy/realization-ledger.md 的 capability table 与卡片；后三行只来自账本。「确立了 / 未确立」两列是账本的措辞，不是本页的评价。
The first five rows are translated word for word from the capability table of codes/bivariate_bicycle/pedagogy/realization-ledger.md and the card; the last three come from the ledger only. “Established / did not establish” is the ledger's wording, not this page's judgement.
尚未演示的：只抄出处写下的Not yet demonstrated: only what the sources wrote down
诚实的实现页要把空白说得和成绩一样具体。这一章不预测，只转抄实现账本与直觉文稿明确写下的东西，并把「还没做」和「靠放大做不到」分开。 An honest realizations page states the gaps as concretely as the achievements. This chapter forecasts nothing; it transcribes what the realization ledger and the intuition essay wrote down, and separates “not yet done” from “cannot be reached by scaling up”.
5.1账本写下的四条空白The four gaps the ledger wrote down
实现账本「Negative results from the sweep」一节，截至检索日期 2026-07-26，没有任何被抓取的实验做过以下四件事：① 运行 [[144,12,12]] 的 gross 存储器——每一个「十二倍」的数字都还只在纸上和模拟里。② 在一个 BB 家族内演示随码距增大的逻辑错误压制——2.3 节的第二句话，需要至少两个码距。③ 实现一个容错的 BB 逻辑门——逻辑操作页的五条记录全是 claimed，没有一条 demonstrated。④ 在硬件上验证 yoder2025tour 的完整模块化指令集。账本接着说：「这些缺席是条目知识状态的一部分。它们防止一份提案被渲染成一次演示，并为未来的更新指出具体目标。」人话：这四条不是遗憾，是标尺——下一次有 BB 实验登上卡片时，看它划掉了哪一条。
The ledger's section “Negative results from the sweep” states that, as of the sweep date 2026-07-26, no fetched experiment had done any of four things: ① run the [[144,12,12]] gross memory: every “twelve-fold” number still lives on paper and in simulation. ② demonstrated increasing-distance logical suppression within a BB family: the second sentence of §2.3, which needs at least two distances. ③ implemented a fault-tolerant BB logical gate: all five records on the logical-operations page are claimed, none demonstrated. ④ validated the full yoder2025tour modular instruction set in hardware. The ledger continues: “These absences are part of the entry's knowledge state. They prevent a proposal from being rendered as a demonstration and identify concrete targets for future updates.” In plain words: the four are not regrets but a yardstick; when the next BB experiment reaches the card, see which line it strikes out.
5.2直觉文稿指出的结构性边界Structural boundaries named by the intuition essay
下面四条不是「还没做」，而是「做了也不会自动变好」，全部来自 QEC-Bank 直觉文稿的「Failure modes」。连接性是资源：「两层平面耦合层仍然需要长程或可重构的耦合器、层间的交叉、或搬动。一层最近邻的芯片不会靠给比特改名就得到 gross 码的开销。」静态码距可能高估电路：一个辅助比特的错误会沿后续 CNOT 传播成关联的数据错误；深度 7 的调度是一个具体电路，别的顺序可能有更小的电路码距——所以「d = 12」不是实验能直接兑现的承诺，实验兑现的是它那个电路的码距。挤在一起的逻辑比特需要可寻址：「一块里的 12 个逻辑比特只在架构能制备、测量、耦合、路由所需的逻辑组合而不抹掉存储优势时才有用。」有限的常数不意味着渐近的好：Postema 与 Kokkelmans 证明所研究的 BB 子类渐近是坏的（postema2025existence，登记待补；《BB 码 · 高中数学版》6.6 节）——把 gross 的两个多项式固定、只放大环面，不会得到码率与相对码距同时不为零的家族。人话：BB 的价值在「有限尺寸的优秀常数」，把这句说成「二维局域的好 qLDPC 码」是错的。
The next four are not “not yet” but “would not automatically improve even if done”, all from the “Failure modes” of the QEC-Bank intuition essay. Connectivity is a resource: “The two planar coupling layers still require long-range or reconfigurable couplers, crossings between layers, or motion. A one-layer nearest-neighbor chip does not obtain gross-code overhead by relabeling qubits.” Static distance can overstate a circuit: one ancilla fault may propagate through later CNOTs into a correlated data error; the depth-7 schedule is one specific circuit and other orderings can have a smaller circuit distance, so “d = 12” is not a promise an experiment redeems directly; what it redeems is the distance of its own circuit. Packed logicals need addressability: “Twelve logical qubits in one block are useful only if an architecture can prepare, measure, couple, and route the desired logical combinations without erasing the memory advantage.” Finite constants do not imply asymptotic goodness: Postema and Kokkelmans prove the studied BB subclass asymptotically bad (postema2025existence, registration pending; §6.6 of “BB Codes · High-School Edition”): fixing gross's two polynomials and only enlarging the torus does not yield a family whose rate and relative distance both stay nonzero. In plain words: BB's value is “strong finite constants”; rewording that as “asymptotically good qLDPC from a two-dimensional local torus” is wrong.
「尚未演示」不等于「不可能」，也不等于「即将演示」。5.2 节是定理与结构层面的边界；5.1 节是账本按检索日期写下的空白；4.3 节的三行只是策展人的记录。引用时不要拉平三者。还要记得账本的日期：2026-07-26 之后的实验不在其中。
“Not yet demonstrated” is neither “impossible” nor “imminent”. §5.2 is theorem- and structure-level; §5.1 is the ledger's gaps as of its sweep date; the three rows of §4.3 are the curator's records only. Do not flatten the three when citing. Also remember the ledger's date: experiments after 2026-07-26 are not in it.
复盘，与去处Replay, and where to go next
论证链：BB 的契约是两层度 3 的平面耦合、六腿检查、每检查一个辅助比特、深度 7 的调度，卡片的三个平台标签是三种付法，其中只有「长线」被真机兑现过（第 1 章）→ 一条 BB 记录要交代五个字段，「每个逻辑比特每轮」是按 k 归一化的数字，「可行 / 压制 / 低于阈值 / 跑了 gross / 逻辑门」是五句强度不同的话（第 2 章）→ 昆仑 [[18,4,4]]、32 个 transmon、(8.91 ± 0.17)%：说了「可行」，明确没说其余四句；与 Willow 不能相除（第 3 章）→ 四条提案各钉在流水线的一层，不可互换；账本里还有三行不在卡片上（第 4 章）→ 四条空白按日期写下，四条结构性边界不靠放大解决（第 5 章）。
The chain: the BB contract is two planar degree-3 coupling layers, six-leg checks, one ancilla per check and a depth-7 schedule; the card's three platform tags are three ways to pay, and only “long wires” has been honoured by a real machine (Ch. 1) → a BB record must state five fields, “per logical qubit per cycle” is a number normalised by k, and “feasible / suppressed / below threshold / ran gross / logical gate” are five sentences of different strength (Ch. 2) → Kunlun [[18,4,4]], 32 transmons, (8.91 ± 0.17)%: it says “feasible” and explicitly not the other four; no division against Willow (Ch. 3) → four proposals, each pinned to one pipeline layer, not interchangeable; three more ledger rows off the card (Ch. 4) → four gaps dated, four structural boundaries that scaling does not remove (Ch. 5).
三条去处。译码器：每一条提案的数字都属于它自己的电路加译码器，BB 译码器页讲 0.8% 的五个限定项与 BP-OSD。逻辑操作：「容错 BB 逻辑门」这条空白的对面，是逻辑操作页五条 claimed 记录。对照组：《Surface Code · 用例与实现》是本页的表面码版：同一套读法，五条 demonstrated 记录、一条低于阈值。
Three roads. Decoders: every proposal's numbers belong to its own circuit plus decoder; the BB decoders page covers the five qualifiers of 0.8% and BP-OSD. Logical operations: across from the gap “fault-tolerant BB logical gate” stand the five claimed records of the logical-operations page. The control group: “Surface Code · Use Cases & Realizations” is this page's surface-code version: the same reading rules, five demonstrated records, one of them below threshold.
符号与读法Symbols & how to read them
| 符号Symbol | 名称与读法Name & how to read it | 在本页中的含义Meaning on this page |
|---|---|---|
| [[n, k, d]] | 双方括号，读「n、k、d 码」Double brackets, read “an n, k, d code” | n 个数据比特存 k 个逻辑比特、码距 d（n、k 见《从高考数学到 Toric Code》4.4 节，d 见5.8 节）。本页：[[144,12,12]]、[[18,4,4]]、[[72,12,6]]、[[288,12,18]]。n data qubits storing k logical qubits at distance d (n, k in §4.4 of “From High-School Math to the Toric Code”, d in §5.8). Here: [[144,12,12]], [[18,4,4]], [[72,12,6]], [[288,12,18]]. |
| l, m | 「l」「m」，环面尺寸“l”, “m”, the torus size | 环面两个方向的格数；gross 为 12 × 6，n = 2lm = 144。Cell counts along the two torus directions; gross is 12 × 6, n = 2lm = 144. |
| A, B, |A| | 两个多项式与项数The two polynomials and their term counts | gross：A = x³ + y + y²，B = y³ + x + x²；检查重量 = |A| + |B| = 6（《BB 码 · 高中数学版》3.1 节）。gross: A = x³ + y + y², B = y³ + x + x²; check weight = |A| + |B| = 6 (§3.1 of “BB Codes · High-School Edition”). |
| ε逻辑比特·轮 / εL | 希腊字母 epsilon，读「每个逻辑比特每轮逻辑错误率」/「每轮逻辑错误率」Greek epsilon, read “logical error per logical qubit per cycle” / “per cycle” | 前者是 BB 卡片的量（按 k 归一化，昆仑 (8.91 ± 0.17)%）；后者是表面码卡片的量（k = 1，Willow 0.143% ± 0.003%）。The former is the BB card's quantity (normalised by k, Kunlun (8.91 ± 0.17)%); the latter the surface card's (k = 1, Willow 0.143% ± 0.003%). |
| ± | 读「正负」Read “plus or minus” | 实验数字后卡片登记的不确定度，约定未注明：(8.91 ± 0.17)%。The uncertainty the card records after an experimental number, convention not stated: (8.91 ± 0.17)%. |
| Λ | 大写希腊字母，读「拉姆达」Capital Greek letter, read “LAM-da” | 压制因子：码距加 2 时每轮逻辑错误率缩小的倍数，设备加译码器的拟合值（表面码实现页 2.2 节）。BB 卡片上没有任何 Λ。Suppression factor: how many times the logical error per cycle shrinks per +2 in distance, a device-plus-decoder fit (§2.2 of the surface realizations page). The BB card carries no Λ. |
| k·d²/n | 读「k d 平方除以 n」Read “k d squared over n” | 比较有限码的指标；BPT 界说二维、比特密度有界、检查作用范围有界的码族满足 k·d²/n ≤ c（c 只取决于作用范围与格点维数）：表面码约 1，gross 12，[[18,4,4]] 约 3.6（本页算的）。A metric for comparing finite codes; the BPT bound says code families in 2D with bounded qubit density and bounded check range have k·d²/n ≤ c (c depends only on the range and site dimension): surface codes about 1, gross 12, [[18,4,4]] about 3.6 (this page's arithmetic). |
| ≈ | 读「约等于」Read “approximately equals” | 两边近似相等：4 × 16 / 18 ≈ 3.6。The two sides are nearly equal: 4 × 16 / 18 ≈ 3.6. |
| 度degree | 图论用语Graph-theory term | 一个点连出的边数；gross 的数据比特度 6 = 3 条 X 检查 + 3 条 Z 检查，拆成两层各度 3。Edges leaving a vertex; a gross data qubit has degree 6 = 3 X checks + 3 Z checks, split into two layers of degree 3. |
本页新增词汇New terms on this page
| 术语Term | 白话定义Plain definition |
|---|---|
| BB 硬件契约BB hardware contract | 度 6 的 Tanner 图（两层平面、每层度 3）、六腿检查、每检查一个辅助比特、深度 7 的调度。A degree-6 Tanner graph (two planar layers, degree 3 each), six-leg checks, one ancilla per check, a depth-7 schedule. |
| demonstrated / proposed | 有被引用的实验论文报告此事 / 设计具体到能模拟或算成本，但没有物理系统执行过。QEC-Bank 机器都不重算其中的数字。A cited experimental paper reported it / concrete enough to simulate or cost, but no physical system executed it. The QEC-Bank machine recomputes neither's numbers. |
| 每个逻辑比特每轮per logical qubit per cycle | 把一块含 k 个逻辑比特的码的每轮失败按逻辑比特归一化后的错误率；卡片不给原始整块数字。A block's per-cycle failure normalised per logical qubit over its k logical qubits; the card gives no raw block-level number. |
| 家族交叉点family crossing | 一族码在多个尺寸上「逻辑错误率对物理错误率」曲线相交的位置，即阈值估计；一个码距的点画不出它。Where a family's “logical versus physical error” curves at several sizes cross, i.e. the threshold estimate; one distance cannot draw it. |
| 变形电路morphing circuit | 在一轮提取中途把码换成另一个码再换回来，以降低连接度；活动的稳定子群随时间变化，探测器模型随之改变。Swapping the code for another midway through an extraction round and back, to lower connectivity; the active stabilizer group varies in time and the detector model changes with it. |
| 实现账本realization ledger | QEC-Bank 的 Level-2 页 pedagogy/realization-ledger.md：区分真机运行、模拟版图与架构提案，附「确立 / 未确立」两列与五字段更新规则。The QEC-Bank Level-2 page pedagogy/realization-ledger.md: separates literal runs, simulated layouts and architecture proposals, with “established / did not establish” columns and the five-field update rule. |
延伸阅读Further reading
- S. Bravyi, A. W. Cross, J. M. Gambetta, D. Maslov, P. Rall, T. J. Yoder, “High-Threshold and Low-Overhead Fault-Tolerant Quantum Memory” (2024)
bravyi2024bicycle（已登记，别名 bravyi2024high）· 两层平面耦合、深度 7 的提取电路、Table 3 的五个码与 0.8%；本页契约的出处。arXiv: 2308.07915bravyi2024bicycle (registered, alias bravyi2024high) · two planar coupling layers, the depth-7 extraction circuit, the five Table 3 codes and 0.8%; the source of this page's contract. arXiv: 2308.07915 - Ke Wang et al., “Demonstration of Low-Overhead Quantum Error Correction Codes”
wang2026lowoverhead（登记待补）· 昆仑处理器上的 [[18,4,4]]，32 个长程耦合 transmon，(8.91 ± 0.17)% 每逻辑比特每轮；唯一的 demonstrated。据文献扫描报告 arXiv: 2505.09684wang2026lowoverhead (registration pending) · [[18,4,4]] on the Kunlun processor, 32 long-range-coupled transmons, (8.91 ± 0.17)% per logical qubit per cycle; the only demonstrated record. From the scout report, arXiv: 2505.09684 - C. Poole, T. M. Graham, M. A. Perlin, M. Otten, M. Saffman, “Architecture for Fast Implementation of Quantum Low-Density Parity-Check Codes with Optimized Rydberg Gates”
poole2025rydberg（登记待补）· 为 BB 连接性优化的中性原子版图与门路由。据文献扫描报告 arXiv: 2404.18809poole2025rydberg (registration pending) · neutral-atom layout and gate routing optimised for BB connectivity. From the scout report, arXiv: 2404.18809 - N. Berthusen et al., “Toward a 2D Local Implementation of Quantum Low-Density Parity-Check Codes”
berthusen2025local（登记待补）· 用搬动 / 通信嵌入长程检查，部分检查少测；节拍改变，探测器随之改变。据文献扫描报告 arXiv: 2404.17676berthusen2025local (registration pending) · embedding long-range checks by motion/communication, measuring some checks less often; cadence and detectors change. From the scout report, arXiv: 2404.17676 - M. H. Shaw, B. M. Terhal, “Lowering Connectivity Requirements for Bivariate Bicycle Codes Using Morphing Circuits”
shaw2025morphing（登记待补）· 度 5、六轮 CNOT 的变形家族；换了族与探测器模型。据文献扫描报告 arXiv: 2407.16336shaw2025morphing (registration pending) · a degree-5, six-CNOT-round morphing family; a different family and detector model. From the scout report, arXiv: 2407.16336 - T. J. Yoder et al., “Tour de Gross: A Modular Quantum Computer Based on Bivariate Bicycle Codes”
yoder2025tour（登记待补）· d = 12 与 18 的 BB 模块、指令集、编译器与资源估计；modular-networked 标签的唯一支撑。据文献扫描报告 arXiv: 2506.03094yoder2025tour (registration pending) · d = 12 and 18 BB modules, instruction set, compiler and resource estimates; the sole backing of the modular-networked tag. From the scout report, arXiv: 2506.03094 - Google Quantum AI, “Quantum error correction below the surface code threshold” (2024)
google2024below（表面码条目的键）· Willow d = 7，0.143% ± 0.003% 每轮，Λ = 2.14 ± 0.02；本页 3.3 节的对照组。arXiv: 2408.13687google2024below (a surface-entry key) · Willow d = 7, 0.143% ± 0.003% per cycle, Λ = 2.14 ± 0.02; the control group of §3.3. arXiv: 2408.13687
每个硬件数字都来自卡片的 realizations 字段或实现账本，标签为 demonstrated / proposed；QEC-Bank 机器不重算它们。本页自己做的算术只有：864 = 144 × 6、143 = 12² − 1、287 = 144 + 143、32 − 18 = 14、k·d²/n = 4 × 16 / 18 ≈ 3.6——都已标注。卡片上五条记录的六个文献键在登记表里全部「metadata pending」，标题、作者与 arXiv 号取自 docs/lit/bivariate_bicycle/ 的扫描报告并如此标注。4.3 节的三行只在账本里。Willow 的 101 个比特来自表面码的文献笔记，不是卡片数据。实验台 bbbuilder 展示的是 [[72,12,6]]，不是昆仑的 [[18,4,4]]——后者的多项式不在 QEC-Bank 数据里。账本的检索日期是 2026-07-26。
Every hardware number comes from the card's realizations field or the realization ledger, labelled demonstrated / proposed; the QEC-Bank machine does not recompute them. This page's own arithmetic is limited to 864 = 144 × 6, 143 = 12² − 1, 287 = 144 + 143, 32 − 18 = 14 and k·d²/n = 4 × 16 / 18 ≈ 3.6, each marked as such. All six bibkeys of the five card records are “metadata pending” in the registry; titles, authors and arXiv ids come from the scout reports under docs/lit/bivariate_bicycle/ and are labelled so. The three rows of §4.3 exist only in the ledger. Willow's 101 qubits come from the surface-code literature notes, not card data. The bbbuilder bench shows [[72,12,6]], not Kunlun's [[18,4,4]], whose polynomials are not QEC-Bank data. The ledger's sweep date is 2026-07-26.
条目总览 · 直觉 · 导览 · 表示阶梯 · 参数与实例 · 形式化 IR 与证书 · 译码器 · 逻辑操作 · 用例与实现 · 关系 · 推导与指南 · 参考文献 —— 表面码的同一侧面：《Surface Code · 用例与实现》 —— QEC-Bank 原页：在 QEC-Bank 中查看此条目 →
Entry overview · Intuition · Guided tour · Representation ladder · Parameters & instances · Formal IR & certificates · Decoders · Logical operations · Use cases & realizations · Relations · Derivations & guides · References — the same facet for the surface code: “Surface Code · Use Cases & Realizations” — QEC-Bank page: Open in the QEC-Bank →